1. Field of the Invention
The present invention relates to a nonvolatile storage element, particularly to a transistor type ferroelectric nonvolatile storage element using a ferroelectric body for a gate thereof and a method of fabricating the same.
2. Description of the Related Art
As a transistor type ferroelectric nonvolatile storage element, there is MFS-FET(Metal-Ferroelectric-Semiconductor-Field Effect Transistor: conductor film-ferroelectric film-semiconductor-field effect type transistor) having a construction in which an oxide film constituting an insulating film of normal MOS-FET(Metal Oxide Semiconductor-Field Effect transistor: conductor film-oxide film-semiconductor-field effect transistor) as a basic structure thereof. The MFS-FET type memory is of a type in which polarization of a ferroelectric body changes threshold voltage of the transistor and a change in resistance of a channel between a source and a drain is read as a change in large or small of a drain current value. This type is characterized by nondestructive reading in which information is not destructed by a reading operation at low voltage since ON/OFF of the transistor is maintained by holding residual polarization of the ferroelectric body.
According to MFS-FET arranged with a ferroelectric body at its gate, it is difficult to produce an excellent interface between the ferroelectric body (F) and the semiconductor (S). A method of avoiding the difficulty is classified into two kinds in gross classification. According to one of the methods, in a ferroelectric transistor having a structure of MFIS (Metal -Ferroelectric-Insulator-Semiconductor: conductor film -ferroelectric body film-insulator film-semiconductor), an insulating film (I) is sandwiched between the ferroelectric body film (F) and the semiconductor (S) of an MFS structure. The ferroelectric body induces electric charge on a surface of a semiconductor substrate via a gate insulating film by polarization thereof.
According to other of the methods, in a ferroelectric body having a structure of MFMIS (Metal-Ferroelectric-Metal -Insulator-Semiconductor: conductor film-ferroelectric film-conductor film-insulating film-semiconductor), a conductor film (M) (or referred to as floating gate) is sandwiched between the ferroelectric body film (F) and the insulating film (I) of the MFIS structure. The invention relates to latter of the MFMIS structure.
Further, a conductor film or a conductor layer described in the specification, includes a metal as well as a conductor of polycrystal silicon, or an alloy of a metal and polycrystal silicon or the like.
According to a conventional MFMIS type ferroelectric memory, as shown by FIG. 4A, a source region 42 and a drain region 43 are formed on a semiconductor substrate 41, at a main face of the semiconductor substrate therebetween, there are laminated an oxide film (SiO2) 44 constituting a gate oxide film and polysilicon (Poly-Si) 45 constituting a lower conductor film, there is laminated Ir/IrO2 (iridium/iridium oxide) constituting a barrier film 46 constituting the lower conductor film and for preventing mutual diffusion between a ferroelectric body material and Poly-Si further thereabove, there is laminated a ferroelectric body thin film (for example, PZT (PbZrXTi1xe2x88x92XO3) ) 47 thereabove and there is laminated an upper conductor film 48, that is, Ir/IrO2 constituting a gate electrode thereabove. A gate structure 49 is formed by subjecting the laminated films to lithography and etching. (Reference: T Nakamura et al. Dig. Tech. Pap. of 1995 I EEE Int. Solid State Circuits Conf. p.68 (1995))
FIG. 4B represents the MFMIS structure of FIG. 4A by an equivalent circuit and capacitance (CF) of a ferroelectric body capacitor comprising the upper MFM structure and capacitance (CI) of a gate insulator capacitor comprising the lower MIS structure, are connected in series. In FIG. 4B, when voltage is applied between the upper electrode A and the semiconductor substrate B to thereby polarize the ferroelectric layer, it is necessary from a view point of a memory holding characteristic to apply the voltage to sufficiently saturate polarization of the ferroelectric body.
Voltage distributed to the ferroelectric capacitor, is dependent on a coupling ratio (CI/(CI+CF)) of the capacitance (CF) of the ferroelectric capacitor and the capacitance (CI) of the gate insulator capacitor.
In order to increase the voltage distributed to the ferroelectric capacitor, it is important to design such that the capacitance (CI) of the gate insulator capacitor becomes larger than the capacitance (CF) of the ferroelectric body capacitor.
Hence, it is conceivable to thin the gate insulating film and thicken the ferroelectric thin film in order to design such that the capacitance (CI) of the gate insulator capacitor becomes larger than the capacitance (CF) of the ferroelectric capacitor, however, there is a limit in thinning the gate insulator film 44 in view of withstand voltage and leakage current. Further, when the ferroelectric body thin film 47 is thickened, in order to saturate polarization of the ferroelectric body, high drive voltage is needed.
A conventional method of making the capacitance (CI) of the gate insulator capacitor larger than the capacitance (CF) of the ferroelectric capacitor by avoiding these problems, is a method of changing areas of the capacitance (CF) and the capacitance (CI) FIG. 4C shows a simple schematic sectional view of carrying out the method. There is provided an MFMIS structure having the ferroelectric layer at only a portion of an area of the MIS (conductive body-insulator-semiconductor) portion for constituting CI. By the conventional method, CI can be designed to be larger than CF as necessary.
The conventional structure as shown by FIG. 4A poses a problem that after forming the MFMI structure (gate structure 49) by the same dimensions, when impurities are introduced to the source region 42 and the drain region 43 and a heat treatment such as activation is carried out, impurities included in the ferroelectric body are extricated and diffused to silicon to thereby deteriorate the device characteristic.
Further, when an end face of the MFMI structure is summarizingly machined as in FIG. 4A, damage is caused at a sidewall thereof and therefore, a leakage path is formed. The leakage path is formed in, for example, dry etching, by adhering an electrode material (conductor material) scraped off in etching and a formed product (conductive) of a resist to the sidewall of the ferroelectric body. When the leakage path is formed, leakage current is conducted to the leakage path, electric charge is accumulated at the lower conductor film (polysilicon film 45, barrier film 46) of the MFMI structure and electric line of force from the ferroelectric film 47 are blocked. As a result, there poses a problem that carriers on the surface of the semiconductor substrate 41 are extinguished, although polarization remains, drain current is prevented from flowing and stored information is extinguished.
Meanwhile, even in the conventional structure in which the area of the upper conductor film of the MFMI structure is made to be smaller than the area of the lower structure in order to make the capacitance (CI) of the gate insulator capacitor lager than the capacitance (CF) of the ferroelectric capacitor as shown by FIG. 4C, after machining the respective films similarly by lithography and etching, when impurities are introduced to the source region 42 and the drain region 43 and a heat treatment such as activation or the like is carried out, impurities included in the ferroelectric body are extricated and diffused to the silicon to thereby pose the problem of deteriorating the device characteristic and cause damage to the side wall and therefore, the leakage path is formed. When the leakage path is formed, leakage current is conducted to the leakage path, electric charge is accumulated at the lower conductor film (polysilicon film 45, barrier film 46) and electric lines of force from the ferroelectric film 47 are blocked. As a result, carriers on the surface of the semiconductor substrate 41 are extinguished, although polarization of the ferroelectric body remains, drain current is prevented from flowing and there poses the problem that the stored information is extinguished.
In order to prevent contamination by the ferroelectric body as described above, as shown by FIG. 5A, there is provided a method in which after forming a normal MOS transistor 51, a ferroelectric body capacitor is connected to a gate 54 of the MOS transistor 51 via a contact hole 53 perforated at an interlayer insulating film 52. However, according to the structure, there is needed an allowance of positioning the gate 54 of the MOS transistor 51 and the contact hole 53 and therefore, a gate electrode width (gate length) cannot be shortened to a minimum machining dimension. Further, when the positioning allowance is made extremely small, for example, as shown by FIG. 5B, there causes a drawback such that the barrier film 46 is connected to the source region 42 and the gate 54, the structure is not operated as a nonvolatile storage element and yield of the transistor is rapidly deteriorated. In this way, according to the ferroelectric transistor having the MFMIS structure, there poses a problem that the gate length cannot be set to a machining dimension of a fabrication process of LSI.
Further, conventionally, as an insulating material of the gate insulating body capacitor, there is used an oxide film having a very small specific inductive capacity (xcex5=3.9), SiON (oxynitride film: xcex5=5 through 7) or a nitride film (xcex5=7 through 8) in comparison with a specific inductive capacity of the ferroelectric material (SBT: xcex5=200, PZT: xcex5=1000) and therefore, in order to design CI to be larger than CF as necessary, the area of the gate insulator capacitor needs to be increased.
Hence, in order to design the capacitance (CI) of the gate insulator capacitor to be larger than the capacitance (CF) Of the ferroelectric body capacitor, there has been carried out a trial that the capacitance (CI) of the gate insulator capacitor is increased by using a material having a specific inductive capacity higher than that of oxide film or nitride film species (for example, CeO2) or the like for the gate insulating film, however, when a material having a high specific inductive capacity of, for example, CeO2 or the like, is formed on silicon by 10 nm, there is formed a layer having a low specific inductive capacity of SiO2 or the like by 5 nm between silicon and the insulating film (CeO2) having the high specific inductive capacity and a total film thickness of the insulating film becomes 15 nm and the capacitance per unit area of the gate insulating film capacitor is reduced. As a result, in order to provide the reduced capacitance, it is necessary to increase the area of the gate insulating film capacitor.
Hence, it is an object of the invention to provide a transistor type ferroelectric body nonvolatile storage element, which can be integrated highly, and having high reliability.
According to an aspect of the invention, there is provided a transistor type ferroelectric body nonvolatile storage element having a gate structure successively laminated with an insulating film, a first conductor film, a ferroelectric body film and a second conductor film on a semiconductor substrate mainly comprising silicon, and a low dielectric constant layer restraining layer formed at an interface between the insulating film, which comprises a high dielectric constant material and the semiconductor substrate.
In this way, there is provided the low dielectric constant layer restraining layer having a thin film thickness including nitrogen at a surface of the semiconductor substrate mainly comprising silicon and therefore, a thick low dielectric constant layer is not formed between the insulating film comprising a high dielectric constant material and the semiconductor substrate. Therefore, a total film thickness of the insulating film is not significantly increased and therefore, in comparison with a case in which the low dielectric constant layer restraining layer is not formed, a gate insulating capacitance per unit area is increased. Therefore, by an amount of increasing the gate insulating capacitance per unit area, it is not necessary to increase an area of the gate insulator capacitor and the memory cell area can be reduced. When a specific example is given, when an insulating film of CeO2 of a high dielectric constant material (xcex5=26), is formed on a semiconductor substrate which is not provided with a low dielectric constant layer restraining layer by 10 nm, a thick low dielectric constant layer of SiO2 or the like is formed between silicon and the insulating film of CeO2 of the high dielectric constant material by 5 nm, however, when the insulating film of CeO2 of the high dielectric constant material (xcex5=26) is formed by 10 nm on the low dielectric constant layer restrain layer having a thin film thickness of 1nm including nitrogen on the surface of the semiconductor substrate, the thick low dielectric constant layer of SiO2 or the like is not formed between silicon and the insulating film of CeO2 of the high dielectric constant material. Therefore, by forming the low dielectric constant layer restraining layer, the total film thickness of the insulating film is not significantly increased and therefore, in comparison with the case in which the low dielectric constant layer restrain layer is not formed, the gate insulating capacitance per unit area is increased by a multiplication factor of about 3 from 0.53 xcexcF/cm2 to 1.68 xcexcF/cm2. Therefore, by the amount of increasing the gate insulating capacitance per unit area, it is not necessary to increase the area of the gate insulator capacitor and the memory cell area can be reduced.
Further, according to another aspect of the invention, it is preferable that the transistor type ferroelectric body nonvolatile storage element has a structure in which thick films of silicon oxide covering a source region and a drain region are provided, the insulating film is disposed above the silicon oxide films and above a channel region of the semiconductor substrate and lengths of the first conductor film and the insulating thin film in a channel length direction are longer than a length of the channel region.
By constructing the semiconductor device in this way, there are oxide films covering the source region and the drain region and therefore, a contaminating substance from the ferroelectric body thin film is prevented from invading the silicon substrate. When the insulating film and the first conductor film are machined, since the thick oxide films cover the source region and the drain region and therefore, damage of an end face of the gate structure is not extended to the semiconductor substrate and leakage current is restrained.
Further, according to another aspect of the invention, there is provided a method of fabricating a transistor type ferroelectric body nonvolatile storage element which is a method of fabricating a transistor type ferroelectric body nonvolatile storage element having a gate structure successively laminated with an insulating film, a first conductor film, a ferroelectric body film and a second conductor film above a semiconductor substrate mainly comprising silicon, the method comprising a step of forming a dummy gate on the semiconductor substrate, a step of forming a source region and a drain region with the dummy gate as a mask, a step of forming thick films of oxide films covering the source region and the drain region by thermally oxidizing a surface of the semiconductor substrate with the dummy gate as the mask, a step of removing the dummy gate and thereafter forming a low dielectric constant layer restraining layer, and a step of forming the insulating film comprising a high dielectric constant material above the low dielectric constant layer restraining layer, wherein the first conductive film, the ferroelectric body film and the second dielectric film are successively formed above the insulating film.
Further, according to another aspect of the invention, it is preferable that according to the method of fabricating a transistor type ferroelectric body nonvolatile storage element, the low dielectric constant layer restraining layer is formed by an ion implanting method, a nitrogen plasma method, vacuum deposition, a laser ablation method, CVD (Chemical Vapor Deposition), or a sputtering method.
Normally, after forming a ferroelectric body capacitor constituted by laminating and etching a first conductor film, a ferroelectric body film and a second conductor film, ions are implanted to a semiconductor substrate and a source region and a drain region are formed by carrying out a heat treatment and therefore, there is a concern of causing damage to the side wall of the ferroelectric body film by the ion implantation. In contrast thereto, according to the fabricating method of the invention, the ferroelectric body capacitor is formed after forming the source region and the drain region and therefore, there is achieved an advantage that there is not the problem of damage to the sidewall. Further, allowance of positioning with a channel length is ensured by forming the first conductive film and the insulating film such that the first conduct film and insulating film are disposed above the channel and end faces thereof are extended above the thick silicon oxide films. In this way, there can be fabricated the transistor type ferroelectric body nonvolatile storage element by using a self alignment process effectively with regard to the gate structure effectively with regard to the gate structure while promoting reliability.
Further, by using the thick films of the silicon oxide films covering the source and the drain regions, parasitic capacitance of the gate electrode portion can be reduced and high-speed operation can be carried out.
Further, according to the transistor type ferroelectric body nonvolatile storage element and the method of fabricating the same, it is preferable that the insulating film is a layer of a material or a layer laminated with two or more of materials selected from a group consisting of Ta2O5, SrTiO3, TiO2, (Ba,Sr) TiO3, Al2O3, ZrO2, HfO2, Y2O3, CeO2, CeZrO2 and YSZ (yttrium oxide stabilized zirconium oxide).
Further, according to the transistor type ferroelectric body nonvolatile storage element and the method of fabricating the same, it is preferable that the ferroelectric body film is a film of a material selected from a group consisting of SrBi2Ta2O9, PbTiO3, PbZrXTi1xe2x88x92XO3, PbYLa1xe2x88x92YZrXTi1xe2x88x92XO3, Bi4Ti3O12, Pb5Ge3O11, SrNbO7 and Sr2TaXNblxe2x88x92XO7.
Further, according to the transistor type ferroelectric body nonvolatile storage element and the method of fabricating the same, it is preferable that the conductor film is a layer of material or a layer laminated with two or more of materials selected from a group consisting of platinum, iridium, iridium oxide and conductive polycrystal silicon.